• BizTalk Expert (Infratstructure Architecture)
• Experienced with "Mapping"
• Solid grip on xslt compiling/code
• The ideal candidate will have some experience with EDI Mapping

-Build Test bench and Validation Environment using System Verilog and the state of the art validation methodologies (OVM)
- Developing state-of-the-art SW to find hard corner cases of the complex logic design, by implementing 'checkers' and random test generators, implement hooks to collect validation coverage data etc
-Interacting closely with the architecture team as well as with the logic designers
-Develop methodology by keeping re-usability as a primary goal and fully document your work.

Necessary Skills (Must Have):
-Strong Understanding of logic design. Ability to understand complex logic design (using System Verilog) within minimum time.
-At least two years of experience in developing RTL validation environment using System Verilog and OVM methodology.
-Strong object oriented language knowledge.
-Skills in software profiling tools for code coverage.
-Hands on working experience with state of the art RTL simulators (VCS, QuestaSim etc)
- Hands on working experience with state of the art RTL design debug tools such as Debussy (Novas software)

Additional Skills Desired (Nice to Have):
-Strong knowledge (at the Physical Encoding/ signal level ) of High Speed Serial protocols such as PCIeGen1/2/3, USB3 and/or SATA
-Good scripting skills in PERL/Python
-C/C++ knowledge would be an added plus

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• Oracle Financials
• Microsoft Dynamics
• SQL Report Writing
• Strong financials background
• Strong verbal and written communication skills
• BS in Finance or related field.? Preference will be given to those with a MBA/Masters Level Degree.